2429 words [ 6 Weblinks ] - Last update: 2016-08-25 Page created: 2004-04-03 [SB]
PlatformsThere exists different hardware platforms on which operating systems are only useable if they are ported or designed for the especially platform. Depending on processor architecture there are designed after the RISC or CISC scheme. Even both architectures are united in some CPU types as hybrids.
RISC systems are optimized on a small instruction set for the processing of machine code and can execute different applications faster than CISC based systems. Programs can be designed only in assembler, but can be accelerated with instruction reduction because many code lines are needed for simple procedures. CISC systems have a complex instruction set to cover a broad application field as possible. Programs for the CISC design can be developed in higher programming languages but often can be accelerated with faster processors or special instruction sets such as 3DNow!, MMX, ISSE, ISSE2 in the CPU. Programs can be developed with fewer instruction lines.
RISC (Reduced Instrucion Set Computer)
Alpha DIGITAL (DEC, Digital Equipment Corporation) developed the alpha architecture inspired from the MIPS and ARM design. From the beginning high value was attached to highest performance and 64-Bit processing breadth. Before DIGITAL gain experience with the CVAX, Rigel and NVAX chips. More than 1,000 alpha systems had DIGITAL delivered to software developer in September 1992. On February 25th, 1992 DIGITAL introduced worldwide the first 64-Bit architecture, the AlphaChip and DECchip 21064 with 150 mhz clock frequency. A new computer line of Alpha AXP systems with workstations, mainframes and server models were announced in November 1992.
The bus protocol EV-6 of Alpha was licensed for the K7 processor (Slot A) of AMD. Functionalities also are from the alpha architecture taken and united with the Intel architecture for Intel 64-Bit processors.
ARM The ARM (Acorn RISC Machine) RISC processor reference was designed by the company Acorn Ltd. in 1983. The first ready reference design was called ARM v1 and manufactured with less than 25,000 transistors in 1985. The first RISC processor fit for use with the ARM v2 design followed in 1986. He was designed so clearly that only 30,000 integrated transistors were needed. Advantage of a small number of transistors are a less electric assumption (less than 1 watt), less energy dissipation and thus less thermal heat than CISC based processors. The company Advanced RISC Machines Ltd. was found by a joint venture of Acorn, Apple and VLSI Tech with one common development team in Novembers 1990. A professed target is to develop new and more efficient RISC processors. The cooperation is was so successfully that in consequence ARM is translated with Advanced RISC Machine. DEC licensed the ARM design and released the StrongARM processor with 233 mhz and a electric assumption of 1 watt on the market. ARM CPUs are used in most electronic equipment and embedded systems but also in full-function computer systems like RISC OS.
Currently since October 2001 the 32-bit ARM v6 design with 35,000 transistors is used with downward compatibly to ARM v5, contains a SIMD extension and has a considerably more efficient instruction processing. The ARM v10 was the reference design with one FPU from 1998. The ARM11 architecture is applied on the ARM v6 design and is used in the wide field of wireless technique in equipment for final consumers, networks and motorcars. The ARM11 is designed for a clock frequency of 350 mhz to more than 1 ghz. (July 2005)
MIPS The first MIPS processor was developed by researchers at the Stanford University in 1984, the basics for it were already created in 1981. Basic idea is to execute instructions within the instruction line if possible without breaks. Per executed instruction only one clock frequency shall be necessary.
MIPS architecture was commercialized of MIPS Computers Systems Inc. MIPS is the acronym for Microprocessor without Interlocked Pipeline Stages. These processors are used in embedded devices, handhelds, Internet routers or also in sgi workstations. MIPS CPUs have a 5-stage instruction line to execute several instructions at the same time. In 1992 MIPS Computer Systems was taken by SGI, the MIPS architecture is developed further.
|MIPS CPU - Versions|
|1985||R2000, supports up to 4 Co-CPUs|
|1988||R3000, 32 kbyte cache each for Instructions and Data, SMP support|
|1991||R4000, 64-Bit CPU, FPU is integral part of the CPU now, only 8-kbyte Cache each for Instructions and Data|
|1993||R4400, 16-kbyte Cache each for Instructions and Data, optional with 1 mbyte external L2-cache supported|
|199?||R5000, 32-kbyte cache each for Instructions and Data, optimized graphic and FPU performance|
|1994||R8000, works with two R4000+ ALU units superscalar on a chip, FPU external|
|1995||R10000, works with two R8000 ALU units and two simplified FPU units on a chip|
|199?||R14000, up to 600 mhz, 200 mhz front side bus|
|199?||R16000, up to 700 mhz, 64-kbyte cache each for Instructions and Data, up to 8 mbyte L2-cache|
PowerPC In 1928 the Galvin Manufacturing Corporation was founded by Paul V. Galvin. At first radios were produced, for the first time also with electrical power connection. With the brand name Motorola car radios were sold at first, because of the high commercial success the whole company renamed in Motorola Inc. in 1947. In 1959 his son Robert W. Galvin took the company which was market leader in the area of electronics and communication meanwhile. In the middle of the seventies the company aligned her business field to high tech electronics and became market leader in mobile telephones at the end of the eighties. After the take-over of General Instrument Corporation Motorola also got market leader for cable modems and settop terminals. The business field extends last to cordless equipment, broadband accesses for the Internet and the development of embedded computer chips for network communication devices, individual solutions, working groups, car and house applications. Motorola established his RISC CPU 68000 (also called m68k, 68k) and the 88000 (also called m88k, 88k). The cooperation between Apple, IBM and Motorola results in the common processor MCP601 on the market in 1992. The PowerPC processor was used in the Apple Macintosh, IBM computers, and embedded devices. With the MPC620 a 64-Bit variant also appeared for the first time. Apple uses currently the MPC970 as G5 for the Macintosh computer. PowerPC CPUs are used by IBM for example in system/370, system/390 and since short time in z/series computer systems.
SPARC Dave Patterson designed the draft for the RISC architecture and prepared the way for the SPARC architecture (Scalable Processor ARChitecture). Technicians of Sun Microsystems defined in derivation of the RISC conceptthe SPARC architecture in 1984. The first SPARC processor was shown the world in 1986, it was an 32-Bit SPARC 86900 "Sunrise" processor with 16 mhz and operated a Sun-4/260 workstation. In 1989 the potential of this technique was recognized and the company SPARC International was created. The defined Goal was to supervise the success of SPARC and to advance the development. SPARC International published the SPARC v7 design in 1986 and introduced it to the software developers. SPARC v8 was extended by hardware computings for multiplication and division in 1990. As well around MMU functions and for 128-Bit Floating point computations. In 1990 over 35 SPARC implementations of companies like Ross Technology with HyperSPARC, Fujitsu with SPARClite and Sun with SuperSPARC and microSPARC are available. SPARC v9 was published in 1993, the support of 64-Bit addressing and data types was new. Processors of Sun with UltraSPARC and Fujitsu with SPARC64 were references.
SPARC processors became an industry standard and are used on a broad range of systems. Included are Servers, workstations, laptop computers, storage systems, network switches, settop boxes and digital cameras. Already at the development a high value was attached to scalability. There are SPARC systems with more than 100 CPUs per system today available.
CISC = Complex Instruction Set Computer
Intel processors Intel (Integrated Electronics) was founded by Gordon E. Moore and Robert Noyce in 1968. Intel also produces beside of processors network components and mainboards with a chip set of her own. USB (Universal Serial Bus) was introduced for the first time on the Comdex in 1996. The number of transistors "doubles" every 18 to 24 months after an statement from Gordon E. Moore, till now it always made come true. The first Intel processor was the 4004 followed by the 8088. First with the 286 the x86 architecture achieve a breakthrough. Before operating systems like MS-DOS worked only in real mode, were at the max. 1 mbyte RAM without Extender got addressed. Since the 386 the protected mode was possible which makes the addressing of up to 4 gbyte RAM on the side of the hardware possible. Booth CPU modes are not compatible to each other, for real mode programs like MS DOS programs a virtual engine is loaded under protected mode operating systems like Windows 9x/NT. With the Pentium MMX a special instruction unit was integrated for the first time, followed by ISSE with Pentium 2 and ISSE2 with Pentium 4 especially for the acceleration of multimedia applications.
|Discount for Intel CPUs|
|Pentium MMX, 233 MHz||660,- DM||220,- DM||-67 %|
|Pentium II, 266 MHz||1.150,- DM||360,- DM||-69 %|
|Pentium II, 300 MHz||1.700,- DM||380,- DM||-78 %|
|Pentium MMX, 233 MHz||119,- DM||129,- DM||+8 %|
|Pentium III, 500 MHz||509,- DM||399,- DM||-21 %|
|Pentium III, 700 MHz||1.699,- DM||519,- DM||-69 %|
|Celeron, 1,2 GHz||153,- EUR||60,- EUR||-61 %|
|Pentium III, 1,2 GHz||383,- EUR||154,- EUR||-60 %|
|Pentium IV, 2,0 GHz||613,- EUR||209,- EUR||-66 %|
*Final consumer prices converted for better comparison in euro
Intel sold in 2003 his 1 Billionth processor and employs about 78,000 people in 40 countries. Intel leads in the area of processors for PC with approx. 80% market share. Intel introduced a new name scheme for his processors in June 2004. Intel is now moving from the sales argument of processor frequency like AMD too. A three-digit number is classifying the performance now. The pentium M with Dothan core as well as the Pentium 4 Extreme Edition counts to the 700s class. The 500s class contains the Mobil and desktop version of the Pentium 4, the 300s class belongs to the Celeron M and Celeron D processors. The Performace can be compared only within a class but not generally over all classes.
Further companies like Cyrix, Rise and IDT built x86 compatible processors for the PC market. VIA took the company Cyrix Technology and were with AMD and Transmeta the only competitiors in the year 2003. Mayn share in the x86 market has Intel, followed by AMD, VIA and Transmeta with the particularly power saving Crusoe CPU for mobile devices.
|1979||8086, 29,100 trans.|
|1982||186, 55,000 trans.|
|1982||286, 134,100 trans.|
|1985||386, 275,000 trans., 1,5 Ám - 1,0 Ám Manufacturing|
|1989||486, 1.2 Mio. trans., 1,0 Ám - 0,6 Ám Manufacturing|
|1993||Pentium was released, 3.2 Mio. trans., 0,8 Ám - 0,35 Ám Manufacturing|
|1997||Pentium, 4.5 Mio. trans. including MMX|
|1997||Pentium II, 512 kbyte L2-cache, 38.5 Mio. trans., 0,35 Ám - 0,25 Ám Manufacturing|
|1999||Pentium III, 40.5 Mio. trans., including MMX, SSE|
|2002||Pentium 4, 55 Mio. Trans., 0,18 Ám - 0,13 Ám Manufacturing, 2005 Successor Pentium D with MMX, SSE, SSE2, SSE3, EM64T|
AMD processors AMD (Advanced Micro Devices) was founded in 1969 and developed at first flash memory. In 1979 AMD got into the microprocessor market and licensed the 8088 and 8086 CPU design from Intel. In 1986 Intel terminated the licence agreement with AMD whereupon the 80386 and 80486 design was rebuild and sold as a cheap alternative. In 1995 AMD purchased the company NexGen Inc. and the Nx586 CPU design which was like that one of the Intel Pentium. This technology flowed into the AMD K5 for the socket 7. With the AMD-K6 the extension 3DNow! was introduced especially for multimedia applications and the MMX instruction set was licensed from Intel. With the AMD K7 (Athlon) the Die size was been extended by ISSE. The AMD K8 is a 64-Bit CPU with own integrated memory controller.
|1998||K6-2 3DNow!, 9.3 Mio. trans.|
|1999||K6-3 3DNow!, with 400 and 450 mhz, 256 kbyte L2 cache, 21.3 Mio. trans.|
|1999||K7, Athlon, MMX, 3Dnow!, 22 Mio. trans., since 2001 Athlon XP with SSE|
|2003||K8, Athlon 64, Cool and Quiet, NX-Bit|